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Resistance's Portable-Adventure-Game-Engine
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rpage
aos
board.h
Go to the documentation of this file.
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/* Resistance's Portable-Adventure-Game-Engine (R-PAGE), Copyright (C) 2019 François Gutherz, Resistance.no
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Released under MIT License, see license.txt for details.
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*/
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#ifdef LATTICE
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#ifndef BOARD_H
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#define BOARD_H
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#define BLTDDAT_ADDR 0xDFF000
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#define DMACONR_ADDR 0xDFF002
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#define VPOSR_ADDR 0xDFF004
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#define VHPOSR_ADDR 0xDFF006
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#define DSKDATR_ADDR 0xDFF008
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#define JOY0DAT_ADDR 0xDFF00A
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#define JOY1DAT_ADDR 0xDFF00C
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#define CLXDAT_ADDR 0xDFF00E
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#define ADKCONR_ADDR 0xDFF010
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#define POT0DAT_ADDR 0xDFF012
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#define POT1DAT_ADDR 0xDFF014
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#define POTINP_ADDR 0xDFF016
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#define SERDATR_ADDR 0xDFF018
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#define DSKBYTR_ADDR 0xDFF01A
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#define INTENAR_ADDR 0xDFF01C
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#define INTREQR_ADDR 0xDFF01E
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#define DSKPTH_ADDR 0xDFF020
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#define DSKPTL_ADDR 0xDFF022
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#define DSKLEN_ADDR 0xDFF024
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#define DSKDAT_ADDR 0xDFF026
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#define REFPTR_ADDR 0xDFF028
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#define VPOSW_ADDR 0xDFF02A
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#define VHPOSW_ADDR 0xDFF02C
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#define COPCON_ADDR 0xDFF02E
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#define SERDAT_ADDR 0xDFF030
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#define SERPER_ADDR 0xDFF032
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#define POTGO_ADDR 0xDFF034
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#define JOYTEST_ADDR 0xDFF036
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#define STREQU_ADDR 0xDFF038
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#define STRVBL_ADDR 0xDFF03A
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#define STRHOR_ADDR 0xDFF03C
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#define STRLONG_ADDR 0xDFF03E
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#define BLTCON0_ADDR 0xDFF040
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#define BLTCON1_ADDR 0xDFF042
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#define BLTAFWM_ADDR 0xDFF044
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#define BLTALWM_ADDR 0xDFF046
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#define BLTCPTH_ADDR 0xDFF048
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#define BLTCPTL_ADDR 0xDFF04A
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#define BLTBPTH_ADDR 0xDFF04C
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#define BLTBPTL_ADDR 0xDFF04E
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#define BLTAPTH_ADDR 0xDFF050
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#define BLTAPTL_ADDR 0xDFF052
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#define BLTDPTH_ADDR 0xDFF054
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#define BLTDPTL_ADDR 0xDFF056
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#define BLTSIZE_ADDR 0xDFF058
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#define BLTCON0L_ADDR 0xDFF05A
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#define BLTSIZV_ADDR 0xDFF05C
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#define BLTSIZH_ADDR 0xDFF05E
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#define BLTCMOD_ADDR 0xDFF060
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#define BLTBMOD_ADDR 0xDFF062
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#define BLTAMOD_ADDR 0xDFF064
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#define BLTDMOD_ADDR 0xDFF066
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#define BLTCDAT_ADDR 0xDFF070
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#define BLTBDAT_ADDR 0xDFF072
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#define BLTADAT_ADDR 0xDFF074
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#define SPRHDAT_ADDR 0xDFF078
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#define BPLHDAT_ADDR 0xDFF07A
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#define DENISEID_ADDR 0xDFF07C
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#define DSKSYNC_ADDR 0xDFF07E
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#define COP1LCH_ADDR 0xDFF080
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#define COP1LCL_ADDR 0xDFF082
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#define COP2LCH_ADDR 0xDFF084
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#define COP2LCL_ADDR 0xDFF086
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#define COPJMP1_ADDR 0xDFF088
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#define COPJMP2_ADDR 0xDFF08A
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#define COPINS_ADDR 0xDFF08C
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#define DIWSTRT_ADDR 0xDFF08E
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#define DIWSTOP_ADDR 0xDFF090
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#define DDFSTRT_ADDR 0xDFF092
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#define DDFSTOP_ADDR 0xDFF094
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#define DMACON_ADDR 0xDFF096
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#define CLXCON_ADDR 0xDFF098
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#define INTENA_ADDR 0xDFF09A
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#define INTREQ_ADDR 0xDFF09C
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#define ADKCON_ADDR 0xDFF09E
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#define AUD0LCH_ADDR 0xDFF0A0
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#define AUD0LCL_ADDR 0xDFF0A2
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#define AUD0LEN_ADDR 0xDFF0A4
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#define AUD0PER_ADDR 0xDFF0A6
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#define AUD0VOL_ADDR 0xDFF0A8
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#define AUD0DAT_ADDR 0xDFF0AA
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#define AUD1LCH_ADDR 0xDFF0B0
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#define AUD1LCL_ADDR 0xDFF0B2
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#define AUD1LEN_ADDR 0xDFF0B4
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#define AUD1PER_ADDR 0xDFF0B6
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#define AUD1VOL_ADDR 0xDFF0B8
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#define AUD1DAT_ADDR 0xDFF0BA
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#define AUD2LCH_ADDR 0xDFF0C0
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#define AUD2LCL_ADDR 0xDFF0C2
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#define AUD2LEN_ADDR 0xDFF0C4
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#define AUD2PER_ADDR 0xDFF0C6
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#define AUD2VOL_ADDR 0xDFF0C8
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#define AUD2DAT_ADDR 0xDFF0CA
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#define AUD3LCH_ADDR 0xDFF0D0
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#define AUD3LCL_ADDR 0xDFF0D2
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#define AUD3LEN_ADDR 0xDFF0D4
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#define AUD3PER_ADDR 0xDFF0D6
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#define AUD3VOL_ADDR 0xDFF0D8
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#define AUD3DAT_ADDR 0xDFF0DA
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#define BPL1PTH_ADDR 0xDFF0E0
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#define BPL1PTL_ADDR 0xDFF0E2
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#define BPL2PTH_ADDR 0xDFF0E4
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#define BPL2PTL_ADDR 0xDFF0E6
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#define BPL3PTH_ADDR 0xDFF0E8
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#define BPL3PTL_ADDR 0xDFF0EA
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#define BPL4PTH_ADDR 0xDFF0EC
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#define BPL4PTL_ADDR 0xDFF0EE
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#define BPL5PTH_ADDR 0xDFF0F0
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#define BPL5PTL_ADDR 0xDFF0F2
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#define BPL6PTH_ADDR 0xDFF0F4
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#define BPL6PTL_ADDR 0xDFF0F6
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#define BPL7PTH_ADDR 0xDFF0F8
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#define BPL7PTL_ADDR 0xDFF0FA
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#define BPL8PTH_ADDR 0xDFF0FC
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#define BPL8PTL_ADDR 0xDFF0FE
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#define BPLCON0_ADDR 0xDFF100
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#define BPLCON1_ADDR 0xDFF102
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#define BPLCON2_ADDR 0xDFF104
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#define BPLCON3_ADDR 0xDFF106
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#define BPL1MOD_ADDR 0xDFF108
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#define BPL2MOD_ADDR 0xDFF10A
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#define BPLCON4_ADDR 0xDFF10C
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#define CLXCON2_ADDR 0xDFF10E
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#define BPL1DAT_ADDR 0xDFF110
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#define BPL2DAT_ADDR 0xDFF112
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#define BPL3DAT_ADDR 0xDFF114
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#define BPL4DAT_ADDR 0xDFF116
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#define BPL5DAT_ADDR 0xDFF118
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#define BPL6DAT_ADDR 0xDFF11A
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#define BPL7DAT_ADDR 0xDFF11C
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#define BPL8DAT_ADDR 0xDFF11E
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#define SPR0PTH_ADDR 0xDFF120
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#define SPR0PTL_ADDR 0xDFF122
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#define SPR1PTH_ADDR 0xDFF124
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#define SPR1PTL_ADDR 0xDFF126
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#define SPR2PTH_ADDR 0xDFF128
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#define SPR2PTL_ADDR 0xDFF12A
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#define SPR3PTH_ADDR 0xDFF12C
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#define SPR3PTL_ADDR 0xDFF12E
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#define SPR4PTH_ADDR 0xDFF130
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#define SPR4PTL_ADDR 0xDFF132
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#define SPR5PTH_ADDR 0xDFF134
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#define SPR5PTL_ADDR 0xDFF136
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#define SPR6PTH_ADDR 0xDFF138
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#define SPR6PTL_ADDR 0xDFF13A
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#define SPR7PTH_ADDR 0xDFF13C
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#define SPR7PTL_ADDR 0xDFF13E
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#define SPR0POS_ADDR 0xDFF140
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#define SPR0CTL_ADDR 0xDFF142
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#define SPR0DATA_ADDR 0xDFF144
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#define SPR0DATB_ADDR 0xDFF146
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#define SPR1POS_ADDR 0xDFF148
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#define SPR1CTL_ADDR 0xDFF14A
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#define SPR1DATA_ADDR 0xDFF14C
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#define SPR1DATB_ADDR 0xDFF14E
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#define SPR2POS_ADDR 0xDFF150
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#define SPR2CTL_ADDR 0xDFF152
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#define SPR2DATA_ADDR 0xDFF154
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#define SPR2DATB_ADDR 0xDFF156
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#define SPR3POS_ADDR 0xDFF158
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#define SPR3CTL_ADDR 0xDFF15A
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#define SPR3DATA_ADDR 0xDFF15C
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#define SPR3DATB_ADDR 0xDFF15E
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#define SPR4POS_ADDR 0xDFF160
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#define SPR4CTL_ADDR 0xDFF162
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#define SPR4DATA_ADDR 0xDFF164
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#define SPR4DATB_ADDR 0xDFF166
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#define SPR5POS_ADDR 0xDFF168
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#define SPR5CTL_ADDR 0xDFF16A
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#define SPR5DATA_ADDR 0xDFF16C
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#define SPR5DATB_ADDR 0xDFF16E
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#define SPR6POS_ADDR 0xDFF170
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#define SPR6CTL_ADDR 0xDFF172
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#define SPR6DATA_ADDR 0xDFF174
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#define SPR6DATB_ADDR 0xDFF176
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#define SPR7POS_ADDR 0xDFF178
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#define SPR7CTL_ADDR 0xDFF17A
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#define SPR7DATA_ADDR 0xDFF17C
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#define SPR7DATB_ADDR 0xDFF17E
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#define COLOR00_ADDR 0xDFF180
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#define COLOR01_ADDR 0xDFF182
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#define COLOR02_ADDR 0xDFF184
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#define COLOR03_ADDR 0xDFF186
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#define COLOR04_ADDR 0xDFF188
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#define COLOR05_ADDR 0xDFF18A
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#define COLOR06_ADDR 0xDFF18C
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#define COLOR07_ADDR 0xDFF18E
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#define COLOR08_ADDR 0xDFF190
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#define COLOR09_ADDR 0xDFF192
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#define COLOR10_ADDR 0xDFF194
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#define COLOR11_ADDR 0xDFF196
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#define COLOR12_ADDR 0xDFF198
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#define COLOR13_ADDR 0xDFF19A
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#define COLOR14_ADDR 0xDFF19C
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#define COLOR15_ADDR 0xDFF19E
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#define COLOR16_ADDR 0xDFF1A0
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#define COLOR17_ADDR 0xDFF1A2
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#define COLOR18_ADDR 0xDFF1A4
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#define COLOR19_ADDR 0xDFF1A6
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#define COLOR20_ADDR 0xDFF1A8
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#define COLOR21_ADDR 0xDFF1AA
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#define COLOR22_ADDR 0xDFF1AC
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#define COLOR23_ADDR 0xDFF1AE
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#define COLOR24_ADDR 0xDFF1B0
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#define COLOR25_ADDR 0xDFF1B2
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#define COLOR26_ADDR 0xDFF1B4
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#define COLOR27_ADDR 0xDFF1B6
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#define COLOR28_ADDR 0xDFF1B8
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#define COLOR29_ADDR 0xDFF1BA
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#define COLOR30_ADDR 0xDFF1BC
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#define COLOR31_ADDR 0xDFF1BE
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#define HTOTAL_ADDR 0xDFF1C0
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#define HSSTOP_ADDR 0xDFF1C2
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#define HBSTRT_ADDR 0xDFF1C4
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#define HBSTOP_ADDR 0xDFF1C6
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#define VTOTAL_ADDR 0xDFF1C8
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#define VSSTOP_ADDR 0xDFF1CA
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#define VBSTRT_ADDR 0xDFF1CC
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#define VBSTOP_ADDR 0xDFF1CE
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#define SPRHSTRT_ADDR 0xDFF1D0
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#define SPRHSTOP_ADDR 0xDFF1D2
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#define BPLHSTRT_ADDR 0xDFF1D4
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#define BPLHSTOP_ADDR 0xDFF1D6
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#define HHPOSW_ADDR 0xDFF1D8
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#define HHPOSR_ADDR 0xDFF1DA
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#define BEAMCON0_ADDR 0xDFF1DC
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#define HSSTRT_ADDR 0xDFF1DE
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#define VSSTRT_ADDR 0xDFF1E0
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#define HCENTER_ADDR 0xDFF1E2
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#define DIWHIGH_ADDR 0xDFF1E4
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#define BPLHMOD_ADDR 0xDFF1E6
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#define SPRHPTH_ADDR 0xDFF1E8
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#define SPRHPTL_ADDR 0xDFF1EA
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#define BPLHPTH_ADDR 0xDFF1EC
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#define BPLHPTL_ADDR 0xDFF1EE
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#define FMODE_ADDR 0xDFF1FC
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#endif // #ifndef BOARD_H
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#endif
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